Underfill of flip chip on laminates: simulation and validation
- 27 November 2002
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- Vol. 22 (2) , 312-320
- https://doi.org/10.1109/adhes.1998.742047
Abstract
The flow characteristics of a number of underfills were evaluated with quartz dies of different patterns and pitches bonded on different substrate surfaces. Perimeter, mixed array, and full array patterns were tested. Observations on the flow front uniformity, streaking, voiding, and filler segregation were collected. The information was compared with the resulted predicted by a new simulation code, PLICE-CAD (plastic IC encapsulation-computer aided design), under DARPA-funded development. The two-phase model of the combined resin and air takes into account geometrical factors such as bumps and die edges, together with boundary conditions in order to track the propagation of the flow fronts accurately. The two-phase flow field is based on the volume-of-fluid (VOF) methodology embedded in a general-purpose 3D flow solver.Keywords
This publication has 5 references indexed in Scilit:
- Plastic Packaging Consortium-first year resultsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Computational simulation of underfill encapsulation of flip-chip ICs. I. Flow modeling and surface-tension effectsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Rheokinetics models for epoxy molding compounds used in IC encapsulationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- High performance underfills development - materials, processes, and reliabilityPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Low-Cost Flip Chip Consortium-first year resultsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002