Construction of irregular LDPC codes with low error floors
- 30 March 2004
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- Vol. 5, 3125-3129
- https://doi.org/10.1109/icc.2003.1203996
Abstract
This work explains the relationship between cycles, stopping sets, and dependent columns of the parity check matrix of low-density parity-check (LDPC) codes. Furthermore, it discusses how these structures limit LDPC code performance under belief propagation decoding. A new metric called extrinsic message degree (EMD) measures cycle connectivity in bipartite graph. Using an easily computed estimate of EMD, we propose a Viterbi-like algorithm that selectively avoids cycles and increases stopping set size. This algorithm yields codes with error floors that are orders of magnitude below those of girth-conditional codes.Keywords
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