Computer Optimization of the Transient Response of an ECL Gate
- 1 January 1971
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Circuit Theory
- Vol. 18 (1) , 197-199
- https://doi.org/10.1109/TCT.1971.1083230
Abstract
A computer program has been developed for the simultaneous optimization of turnon and turnoff in emitter-coupled logic (ECL) logic gates. For given transistor models, the biasing resistors and dc voltage source values are automatically adjusted such that the actual response is as close as possible to the desired response.Keywords
This publication has 2 references indexed in Scilit:
- The Generalized Adjoint Network and Network SensitivitiesIEEE Transactions on Circuit Theory, 1969
- A Rapidly Convergent Descent Method for MinimizationThe Computer Journal, 1963