Peripheral board controller for digital exchange systems
- 1 August 1984
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 19 (4) , 485-490
- https://doi.org/10.1109/jssc.1984.1052171
Abstract
The controller implements a redundant PCM highway port and a 4-Mb serial communication link. Typical features are variable time slot assignment for up to 16 subscribers, processing of status signaling and feature control data, and high level support of the HDLC (high-level data link control) communications protocol. The circuit represents an innovative step in the development of modern subscriber boards in digital switching systems, particularly in the area of fully digital voice and data transmission capability. The circuit is realized in a 3.5-μm NMOS process and contains more than 22000 transistors on a 7.24×5.24 mm die area.Keywords
This publication has 2 references indexed in Scilit:
- The Challenge of the VLSI Technique to Telecommunications SystemsIEEE Journal of Solid-State Circuits, 1980
- Integrated circuits for telephonyProceedings of the IEEE, 1980