An efficient inductance modeling for on-chip interconnects

This publication has 5 references indexed in Scilit:

• Fast generation of statistically-based worst-case modeling of on-chip interconnect
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• Analysis and justification of a simple, practical 2 1/2-D capacitance extraction methodology
  Published by Association for Computing Machinery (ACM) ,1997
• FASTHENRY: a multipole-accelerated 3-D inductance extraction program
  IEEE Transactions on Microwave Theory and Techniques, 1994
• Equivalent Circuit Models for Three-Dimensional Multiconductor Systems
  IEEE Transactions on Microwave Theory and Techniques, 1974
• Inductance Calculations in a Complex Integrated Circuit Environment
  IBM Journal of Research and Development, 1972