Fabrication and numerical simulation of the permeable base transistor
- 1 June 1980
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 27 (6) , 1128-1141
- https://doi.org/10.1109/t-ed.1980.19996
Abstract
A new transistor structure has been reported in which a thin tungsten grating has been embedded inside a single crystal of gallium arsenide. The embedded metal grating, which forms a Schottky barrier with the gallium arsenide, is the base of the transistor and can be used to raise and lower a potential barrier in the semiconductor between the grating lines. The name given to this device is the permeable base transistor (PBT). Devices have been fabricated with a noise figure of 3.5 dB, an associated gain of 9 dB at 4 GHz, and a maximum frequency of oscillation of 17 GHz. This transistor structure is numerically modeled over a wide range of metal grating thicknesses, periodicities, and carrier concentrations. The results from these simulations have been condensed into a unified equation for the base-to-collector transfer characteristic which is valid for the PBT, FET's, and bipolar transistors, and simplifies the comparison between different device structures. A new iterative technique has been used to approximate the nonequilibrium electron velocity, leading to a predicted fTabove 200 GHz, a maximum frequency of oscillation near 1000 GHz and a power-delay product below 1 fJ for devices with small grating dimensions and large carder concentrations.Keywords
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