Modeling of intra-cell defects in CMOS SRAM
- 30 December 2002
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 4 references indexed in Scilit:
- A realistic fault model and test algorithms for static random access memoriesIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1990
- An Improved Method for Detecting Functional Faults in Semiconductor Random Access MemoriesIEEE Transactions on Computers, 1985
- Design consideration of a static memory cellIEEE Journal of Solid-State Circuits, 1983
- Efficient Algorithms for Testing Semiconductor Random-Access MemoriesIEEE Transactions on Computers, 1978