LOGEX-an automatic logic extractor from transistor to gate level for CMOS technology

6 January 2003

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

No. 0738100X,p. 517-522
https://doi.org/10.1109/dac.1988.14809

Abstract

A program for automatic extraction of a gate-level description from a transistor-level description based on the layout of a CMOS VLSI circuit is presented. The extraction algorithm combines transistors to gates to arbitrary complexity without the help of any cell library. The resulting gate-level description provides the input for a digital logic simulator for further investigations.

Keywords

CMOS TECHNOLOGY
AUTOMATIC LOGIC UNITS
CMOS LOGIC CIRCUITS
CIRCUIT SIMULATION
PINS
SWITCHES
VERY LARGE SCALE INTEGRATION
LOGIC GATES
SIGNAL ANALYSIS
LABORATORIES

This publication has 1 reference indexed in Scilit:

MOSSIM: A Switch-Level Simulator for MOS LSI
Published by Institute of Electrical and Electronics Engineers (IEEE) ,1981