A 4-quadrant MOS analog multiplier

1 January 1982

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

Vol. XXV, 36-37
https://doi.org/10.1109/isscc.1982.1156358

Abstract

A 4-quadrant MOS analog multiplier, which achieves linearity better than 0.3% at 75% of full-scale swing, a bandwidth of dc-1.5 MHz and output noise 77dB below full scale, will be reported. Active area is 450 mil².

Keywords

TRANSFER FUNCTIONS
DIFFERENTIAL EQUATIONS
MOS DEVICES
DYNAMIC RANGE
NONLINEAR EQUATIONS
RESISTORS
ANALOG CIRCUITS
FILTERS
VOLTAGE
OPERATIONAL AMPLIFIERS

This publication has 1 reference indexed in Scilit:

A high-performance monolithic multiplier using active feedback
IEEE Journal of Solid-State Circuits, 1974