Substrate voltage bounce in NMOS self-biased substrates
- 1 August 1978
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 13 (4) , 515-519
- https://doi.org/10.1109/jssc.1978.1051087
Abstract
No abstract availableKeywords
This publication has 3 references indexed in Scilit:
- Substrate and load gate voltage compensationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1976
- Algorithms for ASTAP--A network-analysis programIEEE Transactions on Circuit Theory, 1973
- Large Scale Integration of MOS Complex Logic: A Layout MethodIEEE Journal of Solid-State Circuits, 1967