Architecture for the real-time implementation of three-dimensional subband video coding
- 1 January 1992
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- Vol. 3, 225-228 vol.3
- https://doi.org/10.1109/icassp.1992.226210
Abstract
A multiprocessor architecture for the real-time implementation of video coding algorithms is described. This MIMD architecture provides an efficient I/O structure for processing video at various resolutions, and has a distributed frame store and I/O structure suited for the implementation of three-dimensional subband coding. A high-quality 384 kb/s coder has been implemented using the video array processor (VAP) as a research platform for developing the coding algorithm.<>Keywords
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