Switching network architecture for atm based broadband communications
- 25 August 2005
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- Vol. 5, 1-8
- https://doi.org/10.1109/iss.1990.765799
Abstract
Being the communication core of future broadband products, the ATM based switching network architecture must comply with a challenging set of future safe requirements and objectives, which are tentatively defined first. After some period of research work, a number of different solutions for fast packet switching or ATM switching are still proposed. It is thus interesting to discuss the respective attributes of key architecture options for asynchronous switch fabrics. As an illustration, the paper then describes a new ATM based switching architecture for asynchronous communications based on the advantageous combination of a multiple-path self-routing principle with an internal transfer mode using multi-slot cells. These principles are the foundation for a flexible and fault tolerant switching network configuration built with two Weis of standard switching components: the Switch Module board equivalent to a 128 x 128 single-stage matrix operating at 150 Mbit/s, and the Integrated Switching Element LSI circuit realizing an elementary, fully featured, 32 x 32 switching matrix.Keywords
This publication has 5 references indexed in Scilit:
- A shared buffer memory switch for an ATM exchangePublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Queueing in high-performance packet switchingIEEE Journal on Selected Areas in Communications, 1988
- The Knockout Switch: A Simple, Modular Architecture for High-Performance Packet SwitchingIEEE Journal on Selected Areas in Communications, 1987
- Performance enhancement in buffered delta networks using crossbar switches and multiple linksJournal of Parallel and Distributed Computing, 1984
- Banyan networks for partitioning multiprocessor systemsPublished by Association for Computing Machinery (ACM) ,1973