Guarded evaluation
- 1 January 1995
- proceedings article
- Published by Association for Computing Machinery (ACM)
- p. 221-226
- https://doi.org/10.1145/224081.224120
Abstract
The need to reduce the power consumption of the nextgeneration of digital systems is clearly recognized. Atthe system level, power management is a very powerfultechnique and delivers large and unambiguous savings.This paper describes the development and application ofalgorithms that use ideas similar to power management,but that are applicable to logic level synthesis/design.The proposed approach is termed guarded evaluation.The main idea here is to determine, on a per clock cycle...Keywords
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