Scalability of partially depleted SOI technology for sub-0.25 μm logic applications

Publisher Website

23 November 2002

proceedings article
Published by Institute of Electrical and Electronics Engineers (IEEE)

https://doi.org/10.1109/iedm.1997.650454

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This publication has 1 reference indexed in Scilit:

A room temperature 0.1 μm CMOS on SOI
IEEE Transactions on Electron Devices, 1994