A Single Program Multiple Data Parallel Processing Platform for FPGAs

Abstract
The prevalence of software reference code motivates investigation into efficient implementations of software architectures on field-programmable devices. Modern FPGAsallow designers to generate multi-processor architectures that exactly match the processing needs of the algorithm. This paper describes an architecture supporting the single program multiple data model of parallel processing, and presents results taken from a parallel implementation of the JPEG2000 encoding algorithm and Mandelbrot set generation.

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