This work demonstrates application of ferroelectric technology in the embedded "system-on-chip" area. The focus of this paper is twofold: (1) Optimization of the material properties and cell design to achieve 0.9 V operation with fully-saturated hysteresis loops, and high speed (<100ns); and, (2) Demonstration of the overall "system-on-chip" device architecture and operation using the ferroelectric memory in an embedded environment.