Nonlinear Approach for the Optimization of a DRO at 10.4GHz

1 October 1988

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. 268-273
https://doi.org/10.1109/euma.1988.333827

Abstract

This paper describes the design of a 10.4 GHz dielectric resonator stabilized oscillator. The DRO was designed using linear theory and then optimized for power and noise using nonlinear theory based upon the transistor's small signal S-parameters at the operating point, its DC-characteristic, and its noise parameters. The oscillator was fabricated in microstrip technology on a PTFE substrate. The packaged NEC N71083 GaAs MESFET was used. An output power of 14.1 dBm, and a phase noise of -92 dBc/Hz at 10 kHz offset were achieved.

Keywords

DIELECTRIC SUBSTRATES
OSCILLATORS
SIGNAL DESIGN
DESIGN OPTIMIZATION
SCATTERING PARAMETERS
MICROSTRIP
PACKAGING
NATIONAL ELECTRIC CODE
GALLIUM ARSENIDE
MESFETS

This publication has 1 reference indexed in Scilit:

An efficient method for computer aided noise analysis of linear amplifier networks
IEEE Transactions on Circuits and Systems, 1976