Epitaxial layer enhancement of n-well guard rings for CMOS circuits

1 December 1983

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters

Vol. 4 (12) , 438-440
https://doi.org/10.1109/edl.1983.25794

Abstract

n-well guard rings have long been used for isolating potential electron injectors to avoid latch-up of CMOS circuits. Such guard rings are shown to be orders of magnitude more efficient for CMOS fabricated in an epitaxial layer (epi-CMOS) than for bulk (non-epi) CMOS. The maximum escape probability in epi-CMOS measures 3.9E-06 while for bulk CMOS it is 1.8E-02.

Keywords

EPITAXIAL LAYERS
CIRCUITS
SUBSTRATES
CURRENT MEASUREMENT
DOPING
SILICON
ELECTRONS
CMOS PROCESS
LIGHTING CONTROL
BOOSTING

This publication has 0 references indexed in Scilit: