VHDL Description and Formal Verification of Systolic Multipliers
- 1 January 1993
- book chapter
- Published by Elsevier
Abstract
No abstract availableThis publication has 5 references indexed in Scilit:
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- Generalization in the presence of free variables: A mechanically-checked correctness proof for one algorithmJournal of Automated Reasoning, 1991
- Using BDDs to verify multipliersPublished by Association for Computing Machinery (ACM) ,1991
- Computer proofs in Group TheoryJournal of Automated Reasoning, 1990
- Formal verification of hardware correctness: introduction and survey of current researchComputer, 1988