Optoelectronic phase-locked loop with balanced photodetection for clock recovery in high-speed optical time-division-multiplexed systems
- 1 August 2000
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Photonics Technology Letters
- Vol. 12 (8) , 1064-1066
- https://doi.org/10.1109/68.868009
Abstract
An optoelectronic phase-locked loop (PLL) for clock recovery in high-speed optical time-division-multiplexed (OTDM) systems is proposed and experimentally demonstrated. The proposed scheme incorporates a pair of balanced photodetector through which the polarity ambiguity in error signal is resolved, and the cancellation of laser noise enables clock recovery with low timing jitter. Using an electroabsorption modulator as a phase detector, a 10-GHz clock signal with root-mean-square (rms) timing jitter of 300 fs is successfully extracted from 40 and 80 Gb/s return-to-zero (RZ) data stream. A 40- to 10-Gb/s demultiplexing is performed by using the recovered clock signal with no penalty introduced in the bit error rate performance.Keywords
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