A 4K MOS dynamic random-access memory
- 1 October 1973
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 8 (5) , 292-298
- https://doi.org/10.1109/jssc.1973.1050406
Abstract
Presents one version of a 4K dynamic MOS random-access memory utilizing a 3 device/bit cell with an area of less than 2 mil/SUP 2//b, which is fabricated using an n-channel silicon gate MOS technology. The chip requires only a single phase clock and internally generates the multiphase timing required. Other than the single high voltage clock, all inputs and the output are TTL compatible.Keywords
This publication has 3 references indexed in Scilit:
- A TTL compatible 4096-bit N-channel RAMPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1973
- A 4096-bit dynamic MOS RAMPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1972
- Silicon-gate technologyIEEE Spectrum, 1969