Threshold Voltage Uniformity of Mesfets Fabricated on GaAs and in-Alloyed GaAs Substrates

1 October 1984

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. 045-048
https://doi.org/10.1109/gaas.1984.10401276

Abstract

The uniformity of threshold voltage (V th ) for planar MESFETs has been investigated as a function of (1) starting substrate material type (both undoped LEC GaAs and In-alloyed GaAs), (2) dislocation density and FET-to-dislocati on distance and (3) process related parameters. A whole wafer FET array was used to map both full 2" diameter wafer V th uniformity as well as short range (≈1 mm × 1 mm) uniformity. Major results show no correlation of FET threshold voltage with proximity to a dislocation. However, average threshold voltage shifts are observed for high dislocation density regions. Best threshold uniformity to date has been obtained on indium-alloyed LEC GaAs which has large regions of nearly-zero dislocation density. Post-growth annealing of conventional LEC GaAs appears to offer some uniformity enhancement over as-grown material. Best uniformity achieved to date is 8.5 mV standard deviation (S.D.) in threshold voltage for 48 FETs distributed over a 1 mm ² area and 35 mV S.D. across a 2" wafer. These results point to substrate improvements which will enhance parametric yield in future GaAs LSI and VLSI circuits and A/D converters where utmost device uniformity is essential.

Keywords

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