A CMOS pulse density modulator for high-resolution A/D converters

1 December 1984

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits

Vol. 19 (6) , 995-996
https://doi.org/10.1109/JSSC.1984.1052256

Abstract

A high-performance pulse density modulator (PDM) has been fabricated using a 3.5-/spl mu/m CMOS silicon gate technology. The PDM comprises all the analog circuitry needed for an interpolative A/D converter. The PDM can be operated at sample rates of up to 12 MHz and offers a SNR of 80 dB over a baseband of 20 kHz, which corresponds to 13-bit equivalent A/D resolution.

Keywords

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