Clock recovery circuits with instantaneous locking

5 November 1992

journal article
Published by Institution of Engineering and Technology (IET) in Electronics Letters

Vol. 28 (23) , 2127-2130
https://doi.org/10.1049/el:19921366

Abstract

Clock recovery circuits based on matched gated oscillators are proposed. Lock is acquired on the first data transition, even with non-return-to-zero line coding and with instantaneous and arbitrarily large phase shifts of the incoming signal. Simulated results of a fully integrated 650 Mbit/s clock recovery circuit designed in an existing 0.9 μm CMOS technology are also presented.

Keywords

CLOCK RECOVERY CIRCUIT
DATA TRANSITION
CMOS TECHNOLOGY
650 MBIT/S
0.9 MICRON
SIMULATION
NRZ LINE CODING
INCOMING SIGNAL PHASE SHIFTS
INSTANTANEOUS LOCKING
CHARGE PUMP TYPE PLL
MATCHED GATED OSCILLATORS

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