Charge retention of floating-gate transistors under applied bias conditions
- 1 January 1980
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 27 (1) , 297-299
- https://doi.org/10.1109/t-ed.1980.19856
Abstract
The nonvolatile memory-retention characteristics of floating-gate transistors with thin gate oxides are shown to be a strong function of both applied voltages and oxide thickness. Under the assumption that the charge loss mechanism is Fowler-Nordheim tunneling through the thin oxide, an expression is derived which allows the design of floating-gate transistors with optimized retention time.Keywords
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