The Synthesis of Resistor-Capacitor Networks

Abstract
This paper develops a general method of synthesis of a prescribed ratio of output-to-input voltage in the form of a resistor-capacitor lattice. The method is described for both the cases where the output terminals are unloaded and where a resistor-capacitor load is specified. The methods of transformation of the lattice to unbalanced structure are outlined. Illustrative examples are given for each of the cases discussed in the paper.

This publication has 0 references indexed in Scilit: