Measurement of threshold voltage and channel length of submicron MOSFETs

1 January 1988

journal article
Published by Institution of Engineering and Technology (IET) in IEE Proceedings I Solid State and Electron Devices

Vol. 135 (6) , 162-164
https://doi.org/10.1049/ip-i-1.1988.0029

Abstract

A simple method for characterisation of MOSFETs with appreciable source and drain series resistance is presented. The ratio g/g^1/2_m of conductance g and transconductance g_m is shown to be a linear function of gate bias, whose intercept equals the threshold voltage and whose slope is proportional to the square root of the channel length. The method is illustrated using measurements on 0.4 μm to 1.0 μm channel length LDD transistors.

Keywords

GATE BIAS
DRAIN SERIES RESISTANCE
CONDUCTANCE
LINEAR FUNCTION
CHANNEL LENGTH
SQUARE ROOT
SOURCE RESISTANCE
0.4 TO 1.0 MICRON
TRANSCONDUCTANCE
CHARACTERISATION
SUBMICRON MOSFETS
LDD TRANSISTORS
THRESHOLD VOLTAGE

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