Terminal Measurements for Hardness Assurance in TTL Devices

Abstract
A new electrical correlation parameter is described which correlates with neutron damage in TTL integrated circuits. This measurement can be applied to the majority of TTL device types using the normal device pinout, eliminating any requirement for custom metallization patterns. The correlation is based on the analytical relationship between VBE and basetransit time for internal transistors within the integrated circuit. Examples of the effectiveness of this correlation parameter are included for 54L and 54 series TTL devices, along with suggested applications to hardness assurance programs.

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