Implementation of digital filtering algorithms using pipelined vector processors
- 1 January 1987
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in Proceedings of the IEEE
- Vol. 75 (9) , 1293-1303
- https://doi.org/10.1109/PROC.1987.13881
Abstract
The implementation of digital filtering algorithms using pipelined vector processors is investigated. Modeling of vector processors and vectorization methods are explained, and then the performances of several implementation methods are evaluated based on the model. Vector processor implementation of FIR filtering algorithms using the outer product method and the indirect convolution method is evaluated. Recursive and adaptive filtering algorithms, which lead to dependency problems in direct vector processor implementations, are implemented very efficiently using a newly developed vectorization method. The proposed method computes multiple output samples at a time, making the vector length independent of the filter order. Illustrative examples comparing theoretical results with Cray X-MP simulation results are included.Keywords
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