A procedure for obtaining an economical asynchronous sequential circuit directly from a set of regular expressions

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Abstract
Ways of using Regular Expressions in the synthesis of a minimal sequential circuit have previously been presented. These methods consist of first finding an unreduced sequential circuit corresponding to the set of Regular Expressions and then using standard reduction techniques to find a minimal circuit. A method of finding a sequential circuit directly from the Regular Expressions is presented here. The circuit found does not necessarily contain a minimum number of internal states; it is shinto, however, that the circuit can be encoded in terms of combinations of states of binary storage elements so that the operation is free of critical races and that the number of storage elements required will not be more than and will usually be less than that required if conventional synthesis techniques had been used. The synthesis procedure also allows the structure of the derived state diagram to be controlled. In particular, the flowchart is constructed in a form which allows the use of simple combinational circuits. A way of adapting the procedure so as to construct a circuit which corrects certain kinds of errors is also presented. The method is specifically developed for the design of asynchronous sequential circuits but can be simplified so as to be useful in the synthesis of synchronous circuits.

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