A novel, high-speed, reconfigurable demapper-symbol deinterleaver architecture for DVB-T
- 20 January 2003
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- Vol. 4, 382-385
- https://doi.org/10.1109/iscas.1999.780022
Abstract
No abstract availableKeywords
This publication has 6 references indexed in Scilit:
- Practical Low Power Digital VLSI DesignPublished by Springer Nature ,1998
- DVB-T: the COFDM-based system for terrestrial televisionElectronics & Communication Engineering Journal, 1997
- DVB channel coding standards for broadcasting compressed video servicesElectronics & Communication Engineering Journal, 1997
- A commercial DVB-T demodulator chipsetPublished by Institution of Engineering and Technology (IET) ,1997
- Development of a digital terrestrial front endPublished by Institution of Engineering and Technology (IET) ,1997
- Multicarrier modulation for data transmission: an idea whose time has comeIEEE Communications Magazine, 1990