A GaAs monolithic frequency divider using source coupled FET Logic
- 1 August 1982
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters
- Vol. 3 (8) , 197-199
- https://doi.org/10.1109/EDL.1982.25549
Abstract
A GaAs monolithic binary frequency divider based on the new source coupled FET logic (SCFL) is reported. A very wide range for the threshold voltage in the constituent FET's is allowable because in principle the SCFL operates in a current mode. A single-clocked SCFL master-slave frequency divider was successfully fabricated with 1µm-gate MESFET's with a threshold voltage ranging from -0.7 V to +0.2 V. The highest operating frequency was 2.5 GHz at the power consumption of 25 mW.Keywords
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