A 35ns 16K PROM

1 January 1980

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

Vol. XXIII, 148-149
https://doi.org/10.1109/isscc.1980.1156026

Abstract

This paper will cover a 16,384b PROM organized 2K × 8, fabricated on a 140mil square chip, with a typical 25ns access time and 600mW power dissipation.

Keywords

PROM
SWITCHES
DECODING
ADDED DELAY
SCHOTTKY DIODES