A single chip 64*16 broadband switch

Abstract
Conventional space switches encounter speed degradation and are limited in size due to stray capacitances in the crosspoints and their interconnections. A single-chip 64-input*16-output broadband switch that removes these limitations is described. The operation is based on a new switching technique that provides improved speed and increased switch matrix size by isolating each switching crosspoint from the stray capacitive loading in the array. The chip, containing onchip control and decoding, was implemented in 3- mu m CMOS and operates in excess of 150 Mb/s. Computer simulation indicates a potential for 1 Gb/s with 1- mu m CMOS implementation.

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