Latchup-free CMOS structure using shallow trench isolation

• 1 January 1985
• proceedings article
• Published by Institute of Electrical and Electronics Engineers (IEEE)
• https://doi.org/10.1109/iedm.1985.191015

Abstract

Keywords

• ETCHING
• VOLTAGE
• SHALLOW TRENCH ISOLATION
• BORON
• SEMICONDUCTOR DEVICES
• THYRISTORS
• BIPOLAR TRANSISTOR
• EQUIVALENT CIRCUIT