DESIGN FOR TESTABILITY USING SCANPATH TECHNIQUES FOR PATH-DELAY TEST AND MEASUREMENT
- 24 August 2005
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- No. 10893539,p. 365
- https://doi.org/10.1109/test.1991.519696
Abstract
No abstract availableKeywords
This publication has 3 references indexed in Scilit:
- Using scan technology for debug and diagnostics in a workstation environmentPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Pseudorandom built-in self-test methodology and implementation for the IBM RISC System/6000 processorIBM Journal of Research and Development, 1990
- Diagnosis of Automata Failures: A Calculus and a MethodIBM Journal of Research and Development, 1966