A Layout for the Shuffle-Exchange Network with O(N2/log3/2N) Area
- 1 December 1981
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computers
- Vol. C-30 (12) , 977-982
- https://doi.org/10.1109/tc.1981.1675738
Abstract
A layout for the shuffle-exchange network with O(N2/log3/2N) area is described. The layout combines ideas proposed by Thompson, Hoey, and Leiseron, and Preparata and Vuillemin. An interesting feature of the layout is that both the shuffle and the exchange edges have the same average length.Keywords
This publication has 8 references indexed in Scilit:
- A layout for the shuffle-exchange network with Θ(N2⧸log N) areaInformation Processing Letters, 1981
- UltracomputersACM Transactions on Programming Languages and Systems, 1980
- Notes on Shuffle/Exchange-Type Switching NetworksIEEE Transactions on Computers, 1980
- The cube-connected-cycles: A versatile network for parallel computationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1979
- Area-time complexity for VLSIPublished by Association for Computing Machinery (ACM) ,1979
- Interconnections Between Processors and Memory Modules Using the Shuffle-Exchange NetworkIEEE Transactions on Computers, 1976
- Access and Alignment of Data in an Array ProcessorIEEE Transactions on Computers, 1975
- Parallel Processing with the Perfect ShuffleIEEE Transactions on Computers, 1971