New directions in semicustom arrays
- 1 June 1988
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 23 (3) , 728-735
- https://doi.org/10.1109/4.312
Abstract
The CMOS Gate Forest is such a semicustom array which offers an integration level comparable to that of a full-custom VLSI environment. A hierarchical design approach has become essential in order to be able to handle the complexity of such an implementation environment. Although the Gate Forest is representative of second-generation gate arrays, it also incorporates a number of unique features. The Gate Forest is used to describe the major features of a current semicustom design environment. Partitioning, floorplanning, and mapping operation characteristics are described. Current status of the different parts of the Gate Forest design environment are described.Keywords
This publication has 3 references indexed in Scilit:
- Sample-set differential logic (SSDL) for complex high-speed VLSIIEEE Journal of Solid-State Circuits, 1986
- Cascode voltage switch logic: A differential CMOS logic familyPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1984
- High-speed compact circuits with CMOSIEEE Journal of Solid-State Circuits, 1982