Probabilistic miss equations: evaluating memory hierarchy performance
- 10 March 2003
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computers
- Vol. 52 (3) , 321-336
- https://doi.org/10.1109/tc.2003.1183947
Abstract
The increasing gap between processor and main memory speeds makes the role of the memory hierarchy behavior in the system performance essential. Both hardware and software techniques to improve this behavior require good analysis tools that help predict and understand such behavior. Analytical modeling arises as a good choice in this field due to its high speed if its traditional limited precision is overcome. We present a modular analytical modeling strategy for arbitrary set-associative caches with LRU replacement policy. The model differs from all the previous related works in its probabilistic approach. Both perfectly and nonperfectly nested loops as well as reuse between different nests are considered by this model, so it makes the analysis of complete programs with regular computations feasible. Moreover, the model achieves good levels of accuracy while being extremely fast and flexible enough to allow its extension. Our approach has been extensively validated using well-known benchmarks. Finally, the model has also proven its ability to drive code optimizations even more successfully than current production compilers.Keywords
This publication has 25 references indexed in Scilit:
- Let's study whole-program cache behaviour analyticallyPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2004
- Automatic analytical modeling for the estimation of cache missesPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Exact analysis of the cache behavior of nested loopsPublished by Association for Computing Machinery (ACM) ,2001
- Analyzing data locality in numeric applicationsIEEE Micro, 2000
- Analytical modeling of set-associative cache behaviorIEEE Transactions on Computers, 1999
- Modeling set associative caches behavior for irregular computationsPublished by Association for Computing Machinery (ACM) ,1998
- Simplification of array access patterns for compiler optimizationsACM SIGPLAN Notices, 1998
- Trace-driven memory simulationACM Computing Surveys, 1997
- Compiler optimizations for improving data localityPublished by Association for Computing Machinery (ACM) ,1994
- A data locality optimizing algorithmPublished by Association for Computing Machinery (ACM) ,1991