Analysis of single-event effects in combinational logic-simulation of the AM2901 bitslice processor
- 1 December 2000
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Nuclear Science
- Vol. 47 (6) , 2609-2615
- https://doi.org/10.1109/23.903816
Abstract
Using SEUTool (a synthesized VHDL based simulator of single-event fault propagation in combinational circuitry), we have performed a single-event study on a custom-designed CMOS AM2901, a 4-bit bit-slice processor. Analysis shows interesting general trends for single-event upset effects in complex combinational/sequential circuits.Keywords
This publication has 6 references indexed in Scilit:
- Honeywell radiation hardened 32-bit processor single event effects test resultsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Investigations of single-event upsets and charge collection in micro-electronics using variable-length laser-generated charge tracksIEEE Transactions on Nuclear Science, 1998
- Comparison of error rates in combinational and sequential logicIEEE Transactions on Nuclear Science, 1997
- Attenuation of single event induced pulses in CMOS combinational logicIEEE Transactions on Nuclear Science, 1997
- Simulation of design dependent failure exposure levels for CMOS ICsIEEE Transactions on Nuclear Science, 1990
- Techniques of Microprocessor Testing and SEU-Rate PredictionIEEE Transactions on Nuclear Science, 1985