Real-Time feature-extraction architecture for moving-picture transmission over telephone lines

27 October 1983

journal article
Published by Institution of Engineering and Technology (IET) in Electronics Letters

Vol. 19 (22) , 949-950
https://doi.org/10.1049/el:19830647

Abstract

We describe the architecture of a real-time feature extractor used in the encoding of simple moving pictures into 10 kbit/s or less. A central Motorola MC68000 processor controls several NEC μPD 7720 signal-processing chips as hardware subroutines to provide the necessary speed and flexibility.

Keywords

TELECONFERENCING
MOTOROLA MC68000 PROCESSOR
REAL-TIME FEATURE EXTRACTOR
MOVING-PICTURE TRANSMISSION
NEC ΜPD 7720 SIGNAL-PROCESSING CHIPS
ARCHITECTURE
10 KBIT/S
TELEPHONE LINES
ENCODING

This publication has 1 reference indexed in Scilit:

A 32 kb/s toll quality ADPCM codec using a single chip signal processor
Published by Institute of Electrical and Electronics Engineers (IEEE) ,2005