Soft Error Rate Reduction in Dynamic Memory with Trench Capacitor Cell

1 April 1986

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE) in 8th Reliability Physics Symposium

No. 07350791,p. 235-238
https://doi.org/10.1109/irps.1986.362139

Abstract

Alpha-particle-induced soft error rate of dynamic memory with trench capacitor cell has been studied experimentally. Both the bit line mode and the cell mode of the soft error rate can be effectively reduced utilizing a p-well structure on p-type substrate. The reduction ratio is about 1/200 or less.

Keywords

ERROR ANALYSIS
CAPACITORS
SUBSTRATES
RANDOM ACCESS MEMORY
VOLTAGE
ALPHA PARTICLES
TESTING
CAPACITANCE
LIFE ESTIMATION
SEMICONDUCTOR DEVICE MEASUREMENT

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