PMD mitigation at 10 Gbit/s using linear and nonlinearintegrated electronic equaliser circuits
- 20 January 2000
- journal article
- Published by Institution of Engineering and Technology (IET) in Electronics Letters
- Vol. 36 (2) , 163-164
- https://doi.org/10.1049/el:20000175
Abstract
No abstract availableKeywords
This publication has 2 references indexed in Scilit:
- Techniques for high-speed implementation of nonlinear cancellationIEEE Journal on Selected Areas in Communications, 1991
- Electrical signal processing techniques in long-haul fiber-optic systemsIEEE Transactions on Communications, 1990