Buried interconnect structure for symmetric SEEDS

• 1 January 1991
• proceedings article
• Published by AIP Publishing in AIP Conference Proceedings
• Vol. 227  (1) , 192-194
• https://doi.org/10.1063/1.40651

Abstract

Keywords

• ELECTRONICS
• ETCHING
• SURFACES
• YIELD
• COLLECTION
• CONTROL
• RESOLUTION
• TOPOGRAPHY
• INTEGRATED CIRCUIT
• PIN DIODES
• EFFICIENCY
• HEIGHT
• STRUCTURES
• LITHOGRAPHY
• LAYERS