Two-dimensional dynamic analysis of short-channel thin-film MOS transistors using a minicomputer
- 1 April 1982
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 29 (4) , 618-625
- https://doi.org/10.1109/T-ED.1982.20753
Abstract
A computer program is described for simulating two-dimensional thin-film MOS transistors on a minicomputer. Data are presented showing the variation of internal carrier density with time until a steady-state condition is reached. These data show the formation of a drain-induced back channel whose conduction properties depend on the back-channel length and carrier mobility. For channel length below 2.0 µm, the two-dimensional steady-state drain current is shown to fit the expressionI_{D}/W = \frac{\micro_{0}C_{0}}{L[1+(\micro_{0}/\upsilon_{s} V_{D}{L})^{2}]^{1/2}}(V_{G} - V_{T} - V_{D/2})V{D}for values of drain voltage below a specific saturation value (V_{DM}); andI_{D}/W = \frac{10^{-8)(V_{G} - V_{T})^{1/2}}{(T_{ox})^{1/2}L}.(V_{D} - V_{DM}) + I_{DM}for drain voltages above the saturation value.Keywords
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