A PCI-compatible FPGA-coprocessor for 2D/3D image processing
- 1 January 1996
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 136-145
- https://doi.org/10.1109/fpga.1996.564782
Abstract
We present a small-scale FPGA-coprocessor board for PCI-based systems. It features one XC3195A FPGA (<9 K gate equivalents), three XC4013 devices (each up to 13 K gate equivalents), 2 MByte of Flash Memory, 256 KByte of high-speed SRAM and a 16-bit high-speed multiply-and-accumulate unit. The board was designed to speed up algorithms from scientific visualization, in particular the visualization of 3D-datasets. Such algorithms show a large number of short integer or bit operations, which can efficiently be off-loaded from the CPU to an FPGA-coprocessor. Although being exactly tailored to our application, the accelerator constitutes a versatile platform for other algorithms from image or speech processing. The PCI-bus provides the necessary transfer bandwidth for dataflow-intensive computations.Keywords
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