A 7mW-to-183mW Dynamic Quality-Scalable H.264 Video Encoder Chip
- 1 February 2007
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- No. 01936530,p. 280-603
- https://doi.org/10.1109/isscc.2007.373403
Abstract
A dynamic quality-scalable H.264 video encoder is presented for power-adaptive video encoding. In 0.13mum CMOS technology, it requires 470kgates/13.3kB SRAM and consumes 7mW/183mW in encoding 30fps CIF/HD720 video. Compared to the state-of-the-art design for real-time HD720 video encoding, a 49% reduction in gate count and a 61% reduction in internal memory is achievedKeywords
This publication has 1 reference indexed in Scilit:
- A 1.3TOPS H.264/AVC single-chip encoder for HDTV applicationsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2005