High quality films suitable for 64 Mb DRAM use have been deposited by low‐pressure chemical vapor deposition (LPCVD) from (tantalum pentaethoxide) and oxygen. The films have been deposited on silicon, polysilicon, and . Thickness reproducibility, across‐the‐wafer uniformity, and conformality and step‐coverage all are excellent. As‐deposited films are amorphous with smooth surfaces. Annealed films are polycrystalline, and their surfaces are characterized by 2 nm high, 1 μm diam nucleation centers surrounded by circular crystallization fronts. The films must be annealed to get acceptable leakage currents. Leakage currents for annealed 10 to 40 nm films are independent of film thickness and are ≤10−9 A/cm2 at a gate voltage of 1.5 V. Effective dielectric constants decrease with film thickness. The smallest observed equivalent thickness, , is 3.5 nm for 7.5 nm . The minimum practical for the system is approximately 3 nm. These electrical results are explained by the presence of a thin layer at the interface. The layer dominates the electrical behavior of thin annealed films on Si. Effects of the surface structure and minimum on device integration are discussed.