A high-speed 7 bit A/D converter
- 1 December 1979
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 14 (6) , 938-943
- https://doi.org/10.1109/jssc.1979.1051301
Abstract
A 7 bit two-step parallel A/D converter has been designed using a new quantizer-subtractor circuit. The small delay in the new circuit allows digital signal sampling by latching comparators. A sample and hold unit is not needed which results in a fully integrable A/D function. Analog input signals up to 5 MHz can be digitally sampled with sampling frequencies up to 50 MHz. A double layer metallization process is used to reduce the die size to 2.4/spl times/2.5 mm.Keywords
This publication has 2 references indexed in Scilit:
- A monolithic, fully parallel, 8b A/D converterPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1979
- High speed integrated A/D converterPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1976