Microprocessor based implementation and testing of a simple Viterbi detector

Abstract
The Viterbi detector, a detector based on the Viterbi algorithm used to decode convolutional codes, exhibits improved error performance for intersymbol interference (ISI) channels relative to linear receivers. However, the detector is complex as its storage and processing requirements grow exponentially with channel memory. A truncated-state Viterbi detector assumes the channel memory is less than it really is. The authors present an implementation of a truncated-state Viterbi detector on an eight-bit microprocessor. This implementation is tested in the laboratory and experimental results are compared with both theory and a digital computer simulation of the communication process. The results give an estimate of the implementation loss that would be introduced in a more practical digital implementation of the detector.

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